open Ast
module Env = Map.Make (String)

let native_func_names =
  [ "_add"
  ; "_sub"
  ; "_mul"
  ; "_div"
  ; "_adds"
  ; "_subs"
  ; "_muls"
  ; "_divs"
  ; "_xor"
  ; "_or"
  ; "_and"
  ; "_seq"
  ; "_sne"
  ; "_sge"
  ; "_sgt"
  ; "_sle"
  ; "_slt"
  ; "_mod"
  ; "_neg"
  ; "_not"
  ; "puts"
  ; "puti"
  ; "geti"
  ]
;;

let native_asmdx = Func_t (Int_t, [ Int_t; Int_t ])
let native_asmdfloat = Func_t (Float_t, [ Float_t; Float_t ])
let native_eq = Func_t (Int_t, [ Int_t; Int_t ])
let native_not = Func_t (Int_t, [ Int_t ])
let native_neg = Func_t (Int_t, [ Int_t ])
let native_puts = Func_t (Void_t, [ Str_t ])
let native_puti = Func_t (Void_t, [ Int_t ])
let native_geti = Func_t (Int_t, [])

let native_funcs =
  [ native_asmdx                 (*  "_add"  *)
  ; native_asmdx                 (*  "_sub"  *)
  ; native_asmdx                 (*  "_mul"  *)
  ; native_asmdx                 (*  "_div"  *)
  ; native_asmdfloat             (*  "_adds" *)
  ; native_asmdfloat             (*  "_subs" *)
  ; native_asmdfloat             (*  "_muls" *)
  ; native_asmdfloat             (*  "_divs" *)
  ; native_asmdx                 (*  "_xor"  *)
  ; native_asmdx                 (*  "_or"   *)
  ; native_asmdx                 (*  "_and"  *)
  ; native_eq                    (*  "_seq"  *)
  ; native_eq                    (*  "_sne"  *)
  ; native_eq                    (*  "_sge"  *)
  ; native_eq                    (*  "_sgt"  *)
  ; native_eq                    (*  "_sle"  *)
  ; native_eq                    (*  "_slt"  *)
  ; native_asmdx                 (*  "_mod"  *)
  ; native_neg                   (*  "_neg"  *)
  ; native_not                   (*  "_not"  *)
  ; native_puts                  (*  "puts"  *)
  ; native_puti                  (*  "puti"  *)
  ; native_geti                  (*  "geti"  *)
  ]
;;

let add_funcs env name func = Env.add name func env
let _baselib_ = List.fold_left2 add_funcs Env.empty native_func_names native_funcs

open Mips

let builtins =
  [ Label "_add"
  ; Lw (T0, Mem (SP, 0))
  ; Lw (T1, Mem (SP, 4))
  ; Add (V0, T0, T1)
  ; Jr RA
  ; Label "_sub"
  ; Lw (T0, Mem (SP, 0))
  ; Lw (T1, Mem (SP, 4))
  ; Sub (V0, T0, T1)
  ; Jr RA
  ; Label "_div"
  ; Lw (T0, Mem (SP, 0))
  ; Lw (T1, Mem (SP, 4))
  ; Div (V0, T0, T1)
  ; Jr RA
  ; Label "_mul"
  ; Lw (T0, Mem (SP, 0))
  ; Lw (T1, Mem (SP, 4))
  ; Mul (V0, T0, T1)
  ; Jr RA
  ; Label "_adds"
  ; Ls (F1, Mem (SP, 0))
  ; Ls (F2, Mem (SP, 4))
  ; Adds (F0, F1, F2)
  ; Jr RA
  ; Label "_subs"
  ; Ls (F1, Mem (SP, 0))
  ; Ls (F2, Mem (SP, 4))
  ; Subs (F0, F1, F2)
  ; Jr RA
  ; Label "_divs"
  ; Ls (F1, Mem (SP, 0))
  ; Ls (F2, Mem (SP, 4))
  ; Divs (F0, F1, F2)
  ; Jr RA
  ; Label "_muls"
  ; Ls (F1, Mem (SP, 0))
  ; Ls (F2, Mem (SP, 4))
  ; Muls (F0, F1, F2)
  ; Jr RA
  ; Label "_xor"
  ; Lw (T0, Mem (SP, 0))
  ; Lw (T1, Mem (SP, 4))
  ; Xor (V0, T0, T1)
  ; Jr RA
  ; Label "_or"
  ; Lw (T0, Mem (SP, 0))
  ; Lw (T1, Mem (SP, 4))
  ; Or (V0, T0, T1)
  ; Jr RA
  ; Label "_and"
  ; Lw (T0, Mem (SP, 0))
  ; Lw (T1, Mem (SP, 4))
  ; And (V0, T0, T1)
  ; Jr RA
  ; Label "_seq"
  ; Lw (T0, Mem (SP, 0))
  ; Lw (T1, Mem (SP, 4))
  ; Seq (V0, T0, T1)
  ; Jr RA
  ; Label "_sne"
  ; Lw (T0, Mem (SP, 0))
  ; Lw (T1, Mem (SP, 4))
  ; Sne (V0, T0, T1)
  ; Jr RA
  ; Label "_sge"
  ; Lw (T0, Mem (SP, 0))
  ; Lw (T1, Mem (SP, 4))
  ; Sge (V0, T0, T1)
  ; Jr RA
  ; Label "_sgt"
  ; Lw (T0, Mem (SP, 0))
  ; Lw (T1, Mem (SP, 4))
  ; Sgt (V0, T0, T1)
  ; Jr RA
  ; Label "_sle"
  ; Lw (T0, Mem (SP, 0))
  ; Lw (T1, Mem (SP, 4))
  ; Sle (V0, T0, T1)
  ; Jr RA
  ; Label "_slt"
  ; Lw (T0, Mem (SP, 0))
  ; Lw (T1, Mem (SP, 4))
  ; Slt (V0, T0, T1)
  ; Jr RA
  ; Label "_mod"
  ; Lw (T0, Mem (SP, 0))
  ; Lw (T1, Mem (SP, 4))
  ; Div (V0, T0, T1)
  ; Mfhi V0
  ; Jr RA
  ; Label "_not"
  ; Lw (T0, Mem (SP, 0))
  ; Seq (V0, T0, Zero)
  ; Jr RA
  ; Label "_neg"
  ; Lw (T0, Mem (SP, 0))
  ; Sub (V0, T0, Zero)
  ; Jr RA
  ; Label "puti"
  ; Lw (A0, Mem (SP, 0))
  ; Li (V0, Syscall.print_int)
  ; Syscall
  ; Jr RA
  ; Label "geti"
  ; Lw (A0, Mem (SP, 0))
  ; Li (V0, Syscall.read_int)
  ; Syscall
  ; Jr RA
  ; Label "puts"
  ; Lw (A0, Mem (SP, 0))
  ; Li (V0, Syscall.print_str)
  ; Syscall
  ; Jr RA
  ]
;;